Project OS X Forums > Sata Ahci Patch

gabiz_ro

Apr 25 2010, 09:38 PM

Not really related to osx.
Problem is Dell E1705 with ICH7-M working in legacy mode and not in sata ahci mode.
I extracted asl module from bios and disable function disable bit for sata controller,insert module back and flash bios.
Then using one custom pci option rom rewrite pci registers to switch controller from legacy to native sata,set abar .But after that I lost possibillity to boot from internal disk.Probably because bios already detected disk in earlier stage.
Can this registers rewrite can be done though patching DSDT? and if yes how?

THe KiNG

Apr 26 2010, 01:04 AM

Post what you did on DSDT, not sure I understand...
From what I understand, why you disable the SATA controller?
Why not write the registers for AHCI mode in DSDT?

miasma

Apr 26 2010, 05:30 AM

QUOTE (THe KiNG @ Apr 26 2010, 04:04 AM)

Why not write the registers for AHCI mode in DSDT?

Is it possible to enable AHCI mode from DSDT and not from bios directly? Can you post the instructions? I got Gigabyte 945 ICH7 board where no AHCI mode present in BIOS, and want to try and turn it on.

THe KiNG

Apr 26 2010, 05:44 PM

Works only for ICH7-M or ICH7-R

Slice

Apr 26 2010, 08:46 PM

QUOTE (THe KiNG @ Apr 26 2010, 08:44 PM)

Works only for ICH7-M or ICH7-R

Do I have a chance?

CODE

    | |   | +-o AppleIntelPIIXATARoot  <class AppleIntelPIIXATARoot, !registered, !matched, active, busy 0, retain 6>
    | |   |   | {
    | |   |   |   "IOProbeScore" = 0x7d0
    | |   |   |   "IOProviderClass" = "IOPCIDevice"
    | |   |   |   "Serial ATA" = Yes
    | |   |   |   "CFBundleIdentifier" = "com.apple.driver.AppleIntelPIIXATA"
    | |   |   |   "Supported Transfer Modes" = "0x3f061d"
    | |   |   |   "Port Mapping" = 0x1
    | |   |   |   "IOMatchCategory" = "IODefaultMatchCategory"
    | |   |   |   "IOPCIPrimaryMatch" = "0x27c08086"
    | |   |   |   "Controller Name" = "ICH7 SATA"
    | |   |   |   "IOClass" = "AppleIntelPIIXATARoot"
    | |   |   |   "PCI Timing Registers" = "0x40=e377c000 0x44=000000b0 0x48=1100000c 0x54=c000"
    | |   |   | }

gabiz_ro

Apr 27 2010, 07:55 AM

A little confusing. Disabled "Function disable register"

CODE

    Scope (\)
    {
        OperationRegion (RCRB, SystemMemory, 0xF4008000, 0x4000)
        Field (RCRB, DWordAcc, Lock, Preserve)
        {
                    Offset (0x1000),
                    Offset (0x3000),
                    Offset (0x3404),
            HPAS,   2,
                ,   5,
            HPAE,   1,
                    Offset (0x3418),
                ,   1,
            PATD,   0,
            SATD,   0, /**** [color="#FF0000"]here was 1 initial in DSDT[/color]
            SMBD,   0,
            HDAD,   1,
            A97D,   1,
                    Offset (0x341A),
            RPD1,   1,
            RPD2,   1,
            RPD3,   1,
            RPD4,   1,
            RPD5,   1,
            RPD6,   1
        }

@Slice
Only from that info is not possible.ICH7 SATA is generic naming and 27c0 is hw id for ICH7 desktop in non-AHCI mode but what ICH7 variant is not specified.
You must identify exact model of southbridge. 82801XXX and find out which one is.More info ICH7 specs

Slice

Apr 27 2010, 09:49 AM

QUOTE (gabiz_ro @ Apr 27 2010, 10:55 AM)

A little confusing. Disabled "Function disable register"

CODE

    Scope (\)
    {
        OperationRegion (RCRB, SystemMemory, 0xF4008000, 0x4000)
        Field (RCRB, DWordAcc, Lock, Preserve)
        {
                    Offset (0x1000),
                    Offset (0x3000),
                    Offset (0x3404),
            HPAS,   2,
                ,   5,
            HPAE,   1,
                    Offset (0x3418),
                ,   1,
            PATD,   0,
            SATD,   0, /**** [color="#FF0000"]here was 1 initial in DSDT[/color]
            SMBD,   0,
            HDAD,   1,
            A97D,   1,
                    Offset (0x341A),
            RPD1,   1,
            RPD2,   1,
            RPD3,   1,
            RPD4,   1,
            RPD5,   1,
            RPD6,   1
        }

SATD, 0, - it is not a value, it is bit length. It must be 1!
There are bits that BIOS sets to inform OS about
PATD - PATA enabled
SATD - SATA enabled
SMBD - SMBus enabled(?)

HDAD - High Definition Audio
A97D - AC'97 audio mode

QUOTE

@Slice
Only from that info is not possible.ICH7 SATA is generic naming and 27c0 is hw id for ICH7 desktop in non-AHCI mode but what ICH7 variant is not specified.
You must identify exact model of southbridge. 82801XXX and find out which one is.More info ICH7 specs

Thank you for the info. I still don't know about midification but I see it is possible
Click to view attachment

THe KiNG

Apr 27 2010, 12:52 PM

A simple way to test:
Boot from a live Linux CD(do not use sata port in question, guess the DVD is connected on PATA port)
Open terminal and run:
sudo -s

lspci -s 00:1f.2 -nnvvxxx // this it will show the actual registers and controller mode

setpci -s 00:1f.2 90.b // Double check the value of the register

setpci -s 00:1f.2 90.b=40 // Set the new value of the register

setpci -s 00:1f.2 90.b // Check if it changed, if yes then you are lucky, if not gave up u can't set it

lspci -s 00:1f.2 -nnvvxxx // run again to see how is controller set, if success should be in AHCI mode

If this works then I'll show you how to do it on DSDT to be permanent.

Slice

Apr 27 2010, 04:43 PM

Thank you! Now I know something new.
At the moment I have no access to that comp but I will to look what is happen with other one

CODE

SamsungP29:~ root# lspci -s 00:14.1 -nnvvxxx
00:14.1 IDE interface [0101]: ATI Technologies Inc Dual Channel Bus Master PCI IDE Controller [1002:4349] (prog-if 8a [Master SecP PriP])
        Subsystem: Samsung Electronics Co Ltd Unknown device [144d:b028]
        Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
        Status: Cap- 66MHz- UDF- FastB2B- ParErr- DEVSEL=medium >TAbort+ <TAbort- <MAbort- >SERR- <PERR- INTx-
        Latency: 32
        Interrupt: pin A routed to IRQ 10
        Region 0: I/O ports at 01f0
        Region 1: I/O ports at 03f4
        Region 2: I/O ports at 0170
        Region 3: I/O ports at 0374
        Region 4: I/O ports at 8070
00: 02 10 49 43 05 00 00 0a 00 8a 01 01 00 20 00 00
10: f1 01 00 00 f5 03 00 00 71 01 00 00 75 03 00 00
20: 71 80 00 00 00 00 00 00 00 00 00 00 4d 14 28 b0
30: 00 00 00 00 00 00 00 00 00 00 00 00 0a 01 00 00
40: 5d 20 5d 20 77 20 77 20 00 00 04 04 00 00 00 00
50: 00 00 00 00 01 00 05 00 00 00 00 00 00 00 00 00
60: 00 00 01 00 00 6c 1e 6c 00 00 00 00 00 00 00 00
70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00

It is not SATA so it is only demo.

CODE

SamsungP29:~ root# setpci -s 00:14.1 90.b
00
SamsungP29:~ root# setpci -s 00:14.1 90.b=40
SamsungP29:~ root# setpci -s 00:14.1 90.b
00

gabiz_ro

Apr 28 2010, 11:34 AM

QUOTE

setpci -s 00:1f.2 90.b // Check if it changed, if yes then you are lucky, if not gave up u can't set it

lspci -s 00:1f.2 -nnvvxxx // run again to see how is controller set, if success should be in AHCI mode

If this works then I'll show you how to do it on DSDT to be permanent.

Only changing map value and determine switch from legacy to native sata is not enough,in my opinion.
There is need of setting memory space enable and setting abar address then in ABAR+04 offset do make a HBA reset and AHCI enable.
Another particular case
D945GCL with ICH7 setting in bios sata as legacy or native only change offset 90 to 40 but same hw id,no memory space enable,no native ahci,because of ICH7 chipset.

But you are welcome to show how to do this in DSDT.

@Slice
Don't know about ATI but most probably they have another structure of functions and seems offset 90 is read only.

Slice

Apr 28 2010, 12:57 PM

QUOTE (gabiz_ro @ Apr 28 2010, 03:34 PM)

@Slice
Don't know about ATI but most probably they have another structure of functions and seems offset 90 is read only.

I need no ATI patching. I just look the test.

I will try it later with ICH7.

THe KiNG

Apr 28 2010, 02:15 PM

QUOTE (gabiz_ro @ Apr 28 2010, 02:34 PM)

Only changing map value and determine switch from legacy to native sata is not enough,in my opinion.
There is need of setting memory space enable and setting abar address then in ABAR+04 offset do make a HBA reset and AHCI enable.
...
But you are welcome to show how to do this in DSDT.
...

You didn't answer to my question...

IMHO you try to complicate things, when simple fix can work.
So, that register changed with setpci command?
Does controller changed from 0101(legacy mode) to 0106(AHCI)?

Same kind of trick worked on my notebook marvell esata controller, same BIOS missing feature(so stuck on legacy mode) and OS boot just fine with fixed DSDT in AHCI mode...

Anyway here is the code:

CODE

Device (SATA) // or whatever name has in your DSDT
{
    Name (_ADR, 0x001F0002)
    OperationRegion (SAHC, PCI_Config, 0x90, 0x08)
    Field (SAHC, ByteAcc, NoLock, Preserve)
    {
        AHCI,   8
    }
// .... Rest of your stuff from original DSDT
}

// Find (Method _PTS, 1, NotSerialized) and add this method before:

Method (PINI, 0, NotSerialized) // For PCI0/Wake INI
{
    Store (0x40, \_SB.PCI0.SATA.AHCI) // Force SATA in AHCI mode
}

// Add a call for it on _WAK method:

Method (_WAK, 1, NotSerialized)
{
    PINI()
// .... Rest of your stuff from original _WAK method
}


// Find Device (PCI0), check if it have a _INI method, if yes add a call for PINI() like on _WAK one,
// if there isn't create one like this:

Device (PCI0)
{
    Method (_INI, 0, NotSerialized)
    {
        PINI ()
    }
// .... Rest of your stuff from original DSDT
}

Compile, replace in BIOS and try.
Lemme know if works.

Good luck!

gabiz_ro

Apr 29 2010, 02:22 AM

Here is my results

lspci -s 00:1f.2 -nnvvxxx

CODE

00:1f.2 0101: 8086:27c4 (rev 01) (prog-if 80)
    Subsystem: 1028:01cd
    Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
    Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
    Latency: 0
    Interrupt: pin B routed to IRQ 5
    Region 0: I/O ports at 01f0
    Region 1: I/O ports at 03f4
    Region 2: I/O ports at 0170
    Region 3: I/O ports at 0374
    Region 4: I/O ports at bfa0
    Capabilities: [70] Power Management version 2
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
        Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: 86 80 c4 27 05 00 b0 02 01 80 01 01 00 00 00 00
10: f1 01 00 00 f5 03 00 00 71 01 00 00 75 03 00 00
20: a1 bf 00 00 00 00 00 00 00 00 00 00 28 10 cd 01
30: 00 00 00 00 70 00 00 00 00 00 00 00 05 02 00 00
40: 0f e3 0b e3 00 00 00 00 05 00 01 02 00 00 00 00
50: 00 00 00 00 f0 10 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00
80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 02 00 15 00 80 01 80 5a 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00

setpci -s 00:1f.2 90.b

CODE

02

setpci -s 00:1f.2 90.b=40
lspci -s 00:1f.2 -nnvvxxx

CODE

00:1f.2 0106: 8086:27c5 (rev 01) (prog-if 01)
    Subsystem: 1028:01cd
    Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
    Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
    Latency: 0
    Interrupt: pin B routed to IRQ 5
    Region 0: I/O ports at 01f0
    Region 1: I/O ports at 03f4
    Region 2: I/O ports at 0170
    Region 3: I/O ports at 0374
    Region 4: I/O ports at bfa0
    Capabilities: [80] Message Signalled Interrupts: 64bit- Queue=0/0 Enable-
        Address: 00000000  Data: 0000
    Capabilities: [70] Power Management version 2
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
        Status: D0 PME-Enable- DSel=0 DScale=0 PME-
00: 86 80 c5 27 05 00 b8 02 01 01 06 01 00 00 00 00
10: f1 01 00 00 f5 03 00 00 71 01 00 00 75 03 00 00
20: a1 bf 00 00 00 00 00 00 00 00 00 00 28 10 cd 01
30: 00 00 00 00 80 00 00 00 00 00 00 00 05 02 00 00
40: 0f e3 0b e3 00 00 00 00 05 00 01 02 00 00 00 00
50: 00 00 00 00 f0 10 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00
80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 40 00 15 00 80 01 80 5a 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00

And this is result after making changes using PCI option rom

CODE

00:1f.2 0106: 8086:27c5 (rev 01) (prog-if 01)
    Subsystem: 1028:01cd
    Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
    Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
    Latency: 0
    Interrupt: pin B routed to IRQ 40
    Region 0: I/O ports at 01f0
    Region 1: I/O ports at 03f4
    Region 2: I/O ports at 0170
    Region 3: I/O ports at 0374
    Region 4: I/O ports at bfa0
    Region 5: Memory at e0200000 (32-bit, non-prefetchable)
    Capabilities: [80] Message Signalled Interrupts: 64bit- Queue=0/0 Enable+
        Address: fee0300c  Data: 4181
    Capabilities: [70] Power Management version 2
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
        Status: D0 PME-Enable- DSel=0 DScale=0 PME-
    Capabilities: [a8] #12 [0010]
00: 86 80 c5 27 07 04 b0 02 01 01 06 01 00 00 00 00
10: f1 01 00 00 f5 03 00 00 71 01 00 00 75 03 00 00
20: a1 bf 00 00 00 00 20 e0 00 00 00 00 28 10 cd 01
30: 00 00 00 00 80 00 00 00 00 00 00 00 28 02 00 00
40: 0f e3 0b e3 00 00 00 00 05 00 01 02 00 00 00 00
50: 00 00 00 00 f0 10 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 01 a8 02 40 00 00 00 00 00 00 00 00 00 00 00 00
80: 05 70 01 00 0c 30 e0 fe 81 41 00 00 00 00 00 00
90: 40 00 15 00 80 03 80 1a 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 12 00 10 00 48 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00

THe KiNG

Apr 29 2010, 04:15 AM

So it works(with or without pci-o-rom with DSDT changes)?
Provide a full answer, so reader can understand...

Slice

Apr 29 2010, 10:33 AM

I just compare DSDT from two Gigabyte motherboard EP31-DS3l (ICH7 without AHCI) and GA-965P-S3 (ICH8 with working AHCI).
I found no differences!

CODE

            Device (IDE1)
            {
                Name (_ADR, 0x001F0002)
                OperationRegion (PCI, PCI_Config, 0x40, 0x20)
                Field (PCI, DWordAcc, NoLock, Preserve)
                {
                    ITM0,   16,
                    ITM1,   16,
                    SIT0,   4,
                    SIT1,   4,
                            Offset (0x08),
                    UDC0,   2,
                    UDC1,   2,
                            Offset (0x0A),
                    UDT0,   8,
                    UDT1,   8,
                            Offset (0x14),
                    ICF0,   2,
                    ICF1,   2,
                        ,   6,
                    WPPE,   1,
                        ,   1,
                    FAS0,   2,
                    FAS1,   2
                }

                Device (PRIM)
                {
                    Name (_ADR, Zero)
                    Method (_GTM, 0, NotSerialized)
                    {
                        Store (GTM (ITM0, SIT0, UDC0, UDT0, ICF0, FAS0), Local0)
                        Return (Local0)
                    }

                    Method (_STM, 3, NotSerialized)

CODE

            Device (IDE1)
            {
                Name (_ADR, 0x001F0002)
                OperationRegion (PCI, PCI_Config, 0x40, 0x20)
                Field (PCI, DWordAcc, NoLock, Preserve)
                {
                    ITM0,   16,
                    ITM1,   16,
                    SIT0,   4,
                    SIT1,   4,
                            Offset (0x08),
                    UDC0,   2,
                    UDC1,   2,
                            Offset (0x0A),
                    UDT0,   8,
                    UDT1,   8,
                            Offset (0x14),
                    ICF0,   2,
                    ICF1,   2,
                        ,   6,
                    WPPE,   1,
                        ,   1,
                    FAS0,   2,
                    FAS1,   2
                }

                Device (PRIM)
                {
                    Name (_ADR, 0x00)
                    Method (_GTM, 0, NotSerialized)
                    {
                        Store (\_SB.PCI0.ICHX.GTM (ITM0, SIT0, UDC0, UDT0, ICF0, FAS0), Local0)
                        Return (Local0)
                    }

                    Method (_STM, 3, NotSerialized)
                    {
....
                    If (LOr (LAnd (Arg0, 0x4000), LAnd (Arg2, 0x01)))
                    {
                        If (And (Arg2, 0x02))
                        {
                            Subtract (0x04, ShiftRight (And (Arg3, 0x30), 0x04), Local1)
                            If (And (Arg5, 0x02))
                            {
                                Store (0x14, DMA1)
                            }
                            Else
                            {
                                If (And (Arg4, 0x02))
                                {
                                    Multiply (Local1, 0x0F, DMA1)
                                }
                                Else
                                {
                                    Multiply (Local1, 0x1E, DMA1)
                                }
                            }
                        }
                        Else
                        {
                            Store (PIO1, DMA1)
                        }
                    }
                    Else
                    {
                        Store (DMA0, DMA1)
                    }

And so on.
THe KiNG is right. 1bit is enough for the patch.

gabiz_ro

Apr 29 2010, 07:48 PM

Here is part of my DSDT,but how to combine existing data with new one,
If I declare Name (_ADR, 0x001F0002) twice wouldn't be a problem?

CODE

            Device (IDE0)
            {
                Name (_ADR, 0x001F0002)
                OperationRegion (PCFG, PCI_Config, 0x00, 0x0100)
                Field (PCFG, DWordAcc, NoLock, Preserve)
                {
                            Offset (0x40), 
                    TPF0,   1, 
                    TPI0,   1, 
                    TPP0,   1, 
                    TPD0,   1, 
                    TPF1,   1, 
                    TPI1,   1, 
                    TPP1,   1, 
                    TPD1,   1, 
                    TPRT,   2, 
                        ,   2, 
                    TPIS,   2, 
                    TPTR,   1, 
                    TPDE,   1, 
                    TSF0,   1, 
                    TSI0,   1, 
                    TSP0,   1, 
                    TSD0,   1, 
                    TSF1,   1, 
                    TSI1,   1, 
                    TSP1,   1, 
                    TSD1,   1, 
                    TSRT,   2, 
                        ,   2, 
                    TSIS,   2, 
                    TSTR,   1, 
                    TSDE,   1, 
                    PRTS,   2, 
                    PIOS,   2, 
                    SRTS,   2, 
                    SIOS,   2, 
                            Offset (0x48), 
                    SCP0,   1, 
                    SCP1,   1, 
                    SCS0,   1, 
                    SCS1,   1, 
                            Offset (0x4A), 
                    PCT0,   2, 
                        ,   2, 
                    PCT1,   2, 
                            Offset (0x4B), 
                    SCT0,   2, 
                        ,   2, 
                    SCT1,   2, 
                            Offset (0x4C), 
                            Offset (0x54), 
                    PCB0,   1, 
                    PCB1,   1, 
                    SCB0,   1, 
                    SCB1,   1, 
                        ,   2, 
                    PMCR,   1, 
                    PSCR,   1, 
                        ,   4, 
                    FPC0,   1, 
                    FPC1,   1, 
                    FSC0,   1, 
                    FSC1,   1, 
                    PSIG,   2, 
                    SSIG,   2, 
                            Offset (0x90),
                    AHCI,   8
                }

                Name (GTMT, Buffer (0x14)
                {
                    /* 0000 */  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 
                    /* 0008 */  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 
                    /* 0010 */  0x11, 0x00, 0x00, 0x00
                })
                CreateDWordField (GTMT, 0x00, PIO0)
                CreateDWordField (GTMT, 0x04, DMA0)
                CreateDWordField (GTMT, 0x08, PIO1)
                CreateDWordField (GTMT, 0x0C, DMA1)
                CreateDWordField (GTMT, 0x10, IFLG)
                Method (GTMI, 0, NotSerialized)
                {
                    Store (Ones, PIO0)
                    Store (Ones, DMA0)
                    Store (Ones, PIO1)
                    Store (Ones, DMA1)
                    Store (0x10, IFLG)
                }

                Method (UDMA, 3, NotSerialized)
                {
                    If (Arg0)
                    {
                        Return (0x14)
                    }

                    If (Arg1)
                    {
                        If (LEqual (Arg2, 0x02))
                        {
                            Return (0x3C)
                        }
                        Else
                        {
                            Return (0x5A)
                        }
                    }
                    Else
                    {
                        Multiply (Subtract (0x04, Arg2), 0x1E, Local0)
                        Return (Local0)
                    }
                }

                Method (PIOM, 2, NotSerialized)
                {
                    Store (0x09, Local0)
                    Subtract (Local0, Arg0, Local0)
                    Subtract (Local0, Arg1, Local0)
                    Multiply (Local0, 0x1E, Local0)
                    Return (Local0)
                }

                Method (GTMP, 0, NotSerialized)
                {
                    GTMI ()
                    If (LEqual (TPDE, 0x00))
                    {
                        Return (GTMT)
                    }

                    Or (SCP0, IFLG, IFLG)
                    ShiftLeft (TPI0, 0x01, Local0)
                    Or (Local0, IFLG, IFLG)
                    ShiftLeft (SCP1, 0x02, Local0)
                    Or (Local0, IFLG, IFLG)
                    ShiftLeft (TPI1, 0x03, Local0)
                    Or (Local0, IFLG, IFLG)
                    Store (PIOM (TPIS, TPRT), PIO0)
                    Store (PIOM (PRTS, PIOS), PIO1)
                    If (SCP0)
                    {
                        Store (UDMA (FPC0, PCB0, PCT0), DMA0)
                    }
                    Else
                    {
                        If (TPD0)
                        {
                            Store (PIO0, DMA0)
                        }
                    }

                    If (SCP1)
                    {
                        Store (UDMA (FPC1, PCB1, PCT1), DMA1)
                    }
                    Else
                    {
                        If (TPD1)
                        {
                            Store (PIO1, DMA1)
                        }
                    }

                    Return (GTMT)
                }

                Method (GTMS, 0, NotSerialized)
                {
                    GTMI ()
                    If (LEqual (TSDE, 0x00))
                    {
                        Return (GTMT)
                    }

                    Or (SCS0, IFLG, IFLG)
                    ShiftLeft (TSI0, 0x01, Local0)
                    Or (Local0, IFLG, IFLG)
                    ShiftLeft (SCS1, 0x02, Local0)
                    Or (Local0, IFLG, IFLG)
                    ShiftLeft (TSI1, 0x03, Local0)
                    Or (Local0, IFLG, IFLG)
                    Store (PIOM (TSIS, TSRT), PIO0)
                    Store (PIOM (SRTS, SIOS), PIO1)
                    If (SCS0)
                    {
                        Store (UDMA (FSC0, SCB0, SCT0), DMA0)
                    }
                    Else
                    {
                        If (TSD0)
                        {
                            Store (PIO0, DMA0)
                        }
                    }

                    If (SCS1)
                    {
                        Store (UDMA (FSC1, SCB1, SCT1), DMA1)
                    }
                    Else
                    {
                        If (TSD1)
                        {
                            Store (PIO1, DMA1)
                        }
                    }

                    Return (GTMT)
                }

                Method (_STA, 0, NotSerialized)
                {
                    Return (0x0F)
                }

THe KiNG

Apr 29 2010, 08:50 PM

I edited your code ^^^

gabiz_ro

Apr 29 2010, 09:31 PM

Thanks for help THe KiNG
Unfortunately is not working,maybe I do something wrong.Replaced original DSDT bios with attached one but no change on pci registers.

CODE

00:1f.2 0101: 8086:27c4 (rev 01) (prog-if 80)
       Subsystem: 1028:01cd
       Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
       Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
       Latency: 0
       Interrupt: pin B routed to IRQ 5
       Region 0: I/O ports at 01f0
       Region 1: I/O ports at 03f4
       Region 2: I/O ports at 0170
       Region 3: I/O ports at 0374
       Region 4: I/O ports at bfa0
       Capabilities: [70] Power Management version 2
           Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
           Status: D0 PME-Enable- DSel=0 DScale=0 PME-
   00: 86 80 c4 27 05 00 b0 02 01 80 01 01 00 00 00 00
   10: f1 01 00 00 f5 03 00 00 71 01 00 00 75 03 00 00
   20: a1 bf 00 00 00 00 00 00 00 00 00 00 28 10 cd 01
   30: 00 00 00 00 70 00 00 00 00 00 00 00 05 02 00 00
   40: 0f e3 0b e3 00 00 00 00 05 00 01 02 00 00 00 00
   50: 00 00 00 00 f0 10 00 00 00 00 00 00 00 00 00 00
   60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
   70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00
   80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00
   90: 02 00 15 00 80 01 80 5a 00 00 00 00 00 00 00 00
   a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
   b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
   c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00
   d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
   e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
   f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00

offset 90 is 02 like nothing changed.
Click to view attachment

THe KiNG

Apr 29 2010, 11:03 PM

Yes, you did it wrong

Here is the fixed one: Click to view attachment
Make a diff and see what you did wrong

BTW if you replace it in BIOS, make sure you use BIOS extracted one, not from OS one!

Lemme know how goes.

gabiz_ro

Apr 30 2010, 12:11 AM

Seems to be working.
Just DSDT replaced inside bios
Booting:
-FreeDos from USB controller is still in legacy mode
-win xp from internal hdd result error 0x0000007B
-linux from internal hdd result controller works in SATA AHCI mode (linux is standard one,no patches or everything else)
But main problem is now when I try to install xp after windows is starting message,before displaying partition I get error
"setup is out of memory and cannot continue press F3 to exit"
Could that be a problem that AHCI Base address register have default value of 00000000h ?
How can be written at offset 24-27 E0200000h ?

Thanks for your help THe KiNG

THe KiNG

Apr 30 2010, 04:16 AM

Hmn, weird, dunno why XP does that, try to boot/nstall win7 and see if it get stuck on same error.
Those register can be write in same way(if they are not locked, check the datasheet) on PINI method, but you need to create the registers like AHCI one on IDE0...
Tell me the exact offset and value(plus kind, byte word...etc) and I'll do it.
Also post a lspci -nnvvbxxx from linux in AHCI mode.

Slice

Apr 30 2010, 07:54 AM

Windows XP can't be install on AHCI. Usually we install XP with PATA mode, then install drivers for AHCI, then reboot in AHCI mode.
But if you change the BIOS then XP is not possible for you. Try Vista of Windows 7.

gabiz_ro

Apr 30 2010, 08:26 AM

lspci result under linux now

CODE

00:1f.2 SATA controller [0106]: Intel Corporation 82801GBM/GHM (ICH7 Family) SAT
A AHCI Controller [8086:27c5] (rev 01) (prog-if 01)
        Subsystem: Dell Device [1028:01cd]
        Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Step
ping- SERR- FastB2B- DisINTx+
        Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort
- <MAbort- >SERR- <PERR- INTx-
        Latency: 0
        Interrupt: pin B routed to IRQ 28
        Region 0: I/O ports at 01f0 [size=8]
        Region 1: I/O ports at 03f4 [size=4]
        Region 2: I/O ports at 0170 [size=8]
        Region 3: I/O ports at 0374 [size=4]
        Region 4: I/O ports at bfa0 [size=16]
        Region 5: Memory at e0200000 (32-bit, non-prefetchable) [size=1K]
        Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0
Enable+
                Address: fee0300c  Data: 4181
        Capabilities: [70] Power Management version 2
                Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot                                                                                            +,D3cold-)
                Status: D0 PME-Enable- DSel=0 DScale=0 PME-
        Kernel driver in use: ahci
00: 86 80 c5 27 07 04 b0 02 01 01 06 01 00 00 00 00
10: f1 01 00 00 f5 03 00 00 71 01 00 00 75 03 00 00
20: a1 bf 00 00 00 00 20 e0 00 00 00 00 28 10 cd 01
30: 00 00 00 00 80 00 00 00 00 00 00 00 05 02 00 00
40: 0f e3 0b e3 00 00 00 00 05 00 01 02 00 00 00 00
50: 00 00 00 00 f0 10 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00
80: 05 70 01 00 0c 30 e0 fe 81 41 00 00 00 00 00 00
90: 40 00 15 00 80 01 80 5a 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 05 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00

According to datasheet offset 24-27 bit 31:10 allocates spaces for memory registers.
Under linux I see is
20: a1 bf 00 00 00 00 20 e0 00 00 00 00 28 10 cd 01
E0200000

I'll try other win,vista or seven but xp which have tried have slipstreamed drivers already,tested on other notebook with ICH in SATA mode.

Slice

Apr 30 2010, 10:54 AM

QUOTE (gabiz_ro @ Apr 30 2010, 11:26 AM)

I'll try other win,vista or seven but xp which have tried have slipstreamed drivers already,tested on other notebook with ICH in SATA mode.

But not AHCI?
Or there is a special version of WinXP with embedded AHCI drivers? I never see that.

gabiz_ro

Apr 30 2010, 11:05 AM

yes in Sata AHCI mode.
There is many variants of modded xp with almost every important drivers included.
Or this can be done using nlite to insert drivers as text mode drivers and pnp drivers into xp source files then build iso.that you can install xp on native sata ahci.

THe KiNG

Apr 30 2010, 03:05 PM

I know XP can be installed in AHCI mode, but is a PITA...
XP in many way is soooo deprecated, instead of it I use a hard cleaned win7 install, much faster and stable then XP could ever dream...
Tough some would like to use it still, since some app's refuse to wok on win7(even x86).
So is up to you if you still want it, but my advice try win7 and see if it still blued.
If yes then you need to put smth in that memory region

gabiz_ro

Apr 30 2010, 04:21 PM

I'll try this evening.
But still doubts becouse windows is more sensible on boot device.

Slice

Apr 30 2010, 07:27 PM

Undo BIOS, install XP, install AHCI, redo BIOS.

gabiz_ro

Apr 30 2010, 08:48 PM

Already tried to revert bios and install drivers then redo but same error.
Tested now vista and 7 and on both "No drives found"
Maybe if I know how to write few more specific registers.

is not working even loading drivers.I receive BSOD with error 0x0000007e 0xc0000005 ....

sanmiguel

Jun 2 2010, 11:35 AM

Hi King an all the others,

first of all it's an amazing job you do here... So far I'am a "silent reader" here and learned a lot about DSDT and all the other stuff. Now i need your help...

Do you think it's possible to enable AHCI on my nForce MCP67 Controller by DSDT? In BIOS there is no option to do so

Thanks a lot for you help!

Infos:

CODE

00:09.0 IDE interface [0101]: nVidia Corporation MCP67 AHCI Controller [10de:0550] (rev a2) (prog-if 85 [Master SecO PriO])
    Subsystem: Unknown device [1631:c107]
    Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
    Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    Latency: 0 (750ns min, 250ns max)
    Interrupt: pin A routed to IRQ 23
    Region 0: I/O ports at 30f0
    Region 1: I/O ports at 30e4
    Region 2: I/O ports at 30e8
    Region 3: I/O ports at 30e0
    Region 4: I/O ports at 30d0
    Region 5: Memory at f0784000 (32-bit, non-prefetchable)
    Capabilities: [44] Power Management version 2
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
        Status: D0 PME-Enable- DSel=0 DScale=0 PME-
    Capabilities: [8c] SATA HBA <?>
    Capabilities: [b0] Message Signalled Interrupts: Mask- 64bit+ Queue=3/3 Enable-
        Address: 00000000fee00000  Data: 40a0
    Capabilities: [cc] HyperTransport: MSI Mapping Enable- Fixed+
00: de 10 50 05 07 00 b0 00 a2 85 01 01 00 00 80 00
10: f1 30 00 00 e5 30 00 00 e9 30 00 00 e1 30 00 00
20: d1 30 00 00 00 40 78 f0 00 00 00 00 31 16 07 c1
30: 00 00 00 00 44 00 00 00 00 00 00 00 17 01 03 01
40: 31 16 07 c1 01 8c 02 00 00 00 00 00 00 00 00 00
50: 0f 68 38 60 00 00 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 40 8c 00 0f 01 0f 06 42 00 00 fd ab
70: 2c 78 c4 40 01 10 00 00 02 00 00 02 20 00 20 78
80: 00 00 00 40 fe fe ff ff 00 00 fe bf 12 b0 10 00
90: 5f 02 00 00 00 00 00 00 03 ff 22 a3 01 01 00 00
a0: 6e 5a 00 73 00 00 00 00 00 00 00 00 23 34 00 02
b0: 05 cc b6 00 00 00 e0 fe 00 00 00 00 a0 40 00 00
c0: 00 00 00 00 00 00 00 00 00 00 00 00 08 00 02 a8
d0: 00 00 00 00 0a 00 00 00 00 00 40 00 0a 00 00 87
e0: 00 08 2b ee 00 00 3f 00 0f 00 00 80 00 00 00 00
f0: 00 00 00 00 00 00 00 00 02 01 1f 00 00 00 00 00

DSDT Section:

CODE

            Device (SAT0)
            {
                Name (_ADR, 0x00090000)
                Device (PRI0)
                {
                    Name (_ADR, Zero)
                    Name (SPTM, Buffer (0x14)
                    {
                        /* 0000 */    0x78, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
                        /* 0008 */    0x78, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
                        /* 0010 */    0x1F, 0x00, 0x00, 0x00
                    })
                    Method (_GTM, 0, NotSerialized)
                    {
                        Return (SPTM)
                    }

                    Method (_STM, 3, NotSerialized)
                    {
                        Store (Arg0, SPTM)
                    }

                    Device (MAST)
                    {
                        Name (_ADR, Zero)
                        Method (_GTF, 0, NotSerialized)
                        {
                            Store (Buffer (0x07)
                                {
                                    0x03, 0x46, 0x00, 0x00, 0x00, 0xA0, 0xEF
                                }, Local0)
                            Return (Local0)
                        }
                    }

                    Device (SLAV)
                    {
                        Name (_ADR, One)
                        Method (_GTF, 0, NotSerialized)
                        {
                            Store (Buffer (0x07)
                                {
                                    0x03, 0x46, 0x00, 0x00, 0x00, 0xA0, 0xEF
                                }, Local0)
                            Return (Local0)
                        }
                    }
                }

                Device (SEC0)
                {
                    Name (_ADR, One)
                    Name (SSTM, Buffer (0x14)
                    {
                        /* 0000 */    0x78, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
                        /* 0008 */    0x78, 0x00, 0x00, 0x00, 0x0F, 0x00, 0x00, 0x00,
                        /* 0010 */    0x1F, 0x00, 0x00, 0x00
                    })
                    Method (_GTM, 0, NotSerialized)
                    {
                        Return (SSTM)
                    }

                    Method (_STM, 3, NotSerialized)
                    {
                        Store (Arg0, SSTM)
                    }

                    Device (MAST)
                    {
                        Name (_ADR, Zero)
                        Method (_GTF, 0, NotSerialized)
                        {
                            Store (Buffer (0x07)
                                {
                                    0x03, 0x46, 0x00, 0x00, 0x00, 0xA0, 0xEF
                                }, Local0)
                            Return (Local0)
                        }
                    }

                    Device (SLAV)
                    {
                        Name (_ADR, One)
                        Method (_GTF, 0, NotSerialized)
                        {
                            Store (Buffer (0x07)
                                {
                                    0x03, 0x46, 0x00, 0x00, 0x00, 0xA0, 0xEF
                                }, Local0)
                            Return (Local0)
                        }
                    }
                }

                Method (DRMP, 0, NotSerialized)
                {
                    Return (R_S0)
                }
            }

THe KiNG

Jun 2 2010, 02:47 PM

No idea sorry.
Nvidia has 0 docs avail(only for paid "premium vendors"), so w/o docs is hard to tell what you can do...
Try to compare lspci registers from controller working in SATA AHCI mode with yours, look on registers and play using setpci command.

Good luck, and let us know the results.

sanmiguel

Jun 4 2010, 09:14 AM

Thanks so far....

Tried to switch a little to ubuntu and googled a lot lspci outputs and dmsg logs to compare with my system. But it seems that the MCP67 contollers almost all are working in IDE mode:

CODE

[    2.632458] ahci 0000:00:09.0: irq 27 for MSI/MSI-X
[    2.632464] ahci 0000:00:09.0: controller can do NCQ, turning on CAP_NCQ
[    2.632526] ahci 0000:00:09.0: AHCI 0001.0100 32 slots 4 ports 3 Gbps 0xf impl IDE mode
[    2.632530] ahci 0000:00:09.0: flags: 64bit ncq sntf led clo pmp pio slum part
[    2.632534] ahci 0000:00:09.0: setting latency timer to 64
[    2.640455] ACPI: Battery Slot [BAT0] (battery present)
[    2.674488] scsi0 : ahci
[    2.674596] scsi1 : ahci
[    2.674662] scsi2 : ahci
[    2.674720] scsi3 : ahci

and:

CODE

[0101]: nVidia Corporation MCP67 AHCI Controller [10de:0550]

if i google for:

CODE

"[0106]: nVidia Corporation MCP67 AHCI Controller [10de:0550]"

there are no results

I'll keep you updated...

gushorty

Jun 25 2010, 07:40 AM

Anybody who believes that installing/re-installing WinXP is necessary or a PITA, let me introduce you to the few simple steps that will have your system in AHCI mode in no time at all.

1.) Download the most recent drivers for your SATA interface from the manufacturers site. (eg. for me it was the ICH7 AHCI drivers)

2.) Go to Device Manger/Hardware, select the Intel SATA/IDE Host controller, the click 'update drivers/selcet driver manually/have disk' and select the path you extracted your intel files into and select your chipset (ICH7 for me).

WinXP will warn you about the driver not being right, and not to install (because you are not in AHCI mode yet), but choose install anyway.

3.) Reboot. When your BIOS screen shows, select SETUP and enable AHCI, reboot again.

That's it, it may take a little longer on that first reboot, since Windows has to finish updating the registry and drivers. But after that, XP booted from the drives in AHCI-mode without any problems. No reinstall, no registry hacking, just a driver update to the latest AHCI drivers for you before enabling AHCI

Took me only a few minutes and I converted my XP install over to AHCI ready mode, and have been using it that way ever since.

XPbIM3

Aug 29 2010, 06:16 PM

QUOTE (Slice @ May 1 2010, 01:27 AM)

Undo BIOS, install XP, install AHCI, redo BIOS.

nope, had some problems when installing XP on p5b with AHCI, the right way is to inject AHCI intel drivers into bootable XP iso.

i have another question:
Successfully forced ICH7M in Aspire One to be AHCI from ubuntu as The King assumed below, trying to do that with DSDT patch with Snow Leo.

Update:
Double checked my DSDT, corrected a mistake, now i got "Still waiting for root device" ><

Update2:
it seems like SATA controller changed it's mode that's why standart ATA driver refused to load, but DevID was not changed and AHCI driver refused to load too. Adding necessary ID to Plist made no change. Thinking about hex patch of kext.

Update3:
Found a darwin version of pciutils. directly set mode with setpci under SnowLeo. DevId changed!
:confused:

XPbIM3

Aug 29 2010, 11:48 PM

got those dumps from linux:
ata:

CODE

00:1f.2 IDE interface [0101]: Intel Corporation 82801GBM/GHM (ICH7 Family) SATA IDE Controller [8086:27c4] (rev 02) (prog-if 80 [Master])
    Subsystem: Acer Incorporated [ALI] Device [1025:015b]
    Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
    Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx+
    Latency: 0
    Interrupt: pin B routed to IRQ 17
    Region 0: I/O ports at 01f0 [size=8]
    Region 1: I/O ports at 03f4 [size=1]
    Region 2: I/O ports at 0170 [size=8]
    Region 3: I/O ports at 0374 [size=1]
    Region 4: I/O ports at 60a0 [size=16]
    Capabilities: [70] Power Management version 2
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
        Status: D0 PME-Enable- DSel=0 DScale=0 PME-
    Kernel driver in use: ata_piix
00: 86 80 c4 27 05 00 b8 02 02 80 01 01 00 00 00 00
10: 01 00 00 00 01 00 00 00 01 00 00 00 01 00 00 00
20: a1 60 00 00 00 00 00 00 00 00 00 00 25 10 5b 01
30: 00 00 00 00 70 00 00 00 00 00 00 00 0b 02 00 00
40: 07 a3 00 c0 00 00 00 00 01 00 01 00 00 00 00 00
50: 00 00 00 00 10 10 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00
80: 05 70 00 00 00 00 00 00 00 00 00 00 00 00 00 00
90: 02 00 15 00 80 01 80 da 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 0d 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00

ahci:

CODE

00:1f.2 SATA controller [0106]: Intel Corporation 82801GBM/GHM (ICH7 Family) SATA AHCI Controller [8086:27c5] (rev 02) (prog-if 01)
    Subsystem: Acer Incorporated [ALI] Device [1025:015b]
    Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
    Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
    Latency: 0
    Interrupt: pin B routed to IRQ 29
    Region 0: I/O ports at 60b0 [size=8]
    Region 1: I/O ports at 60c8 [size=4]
    Region 2: I/O ports at 60b8 [size=8]
    Region 3: I/O ports at 60cc [size=4]
    Region 4: I/O ports at 60a0 [size=16]
    Region 5: Memory at 78544000 (32-bit, non-prefetchable) [size=1K]
    Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Queue=0/0 Enable+
        Address: fee0300c  Data: 4191
    Capabilities: [70] Power Management version 2
        Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
        Status: D0 PME-Enable- DSel=0 DScale=0 PME-
    Kernel driver in use: ahci
00: 86 80 c5 27 07 04 b0 02 02 01 06 01 00 00 00 00
10: b1 60 00 00 c9 60 00 00 b9 60 00 00 cd 60 00 00
20: a1 60 00 00 00 40 54 78 00 00 00 00 25 10 5b 01
30: 00 00 00 00 80 00 00 00 00 00 00 00 0b 02 00 00
40: 47 a3 45 90 00 00 00 00 05 00 01 01 00 00 00 00
50: 00 00 00 00 15 50 00 00 00 00 00 00 00 00 00 00
60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
70: 01 00 02 40 00 00 00 00 00 00 00 00 00 00 00 00
80: 05 70 01 00 0c 30 e0 fe 91 41 00 00 00 00 00 00
90: 40 00 15 00 80 01 80 da 00 00 00 00 00 00 00 00
a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
c0: 00 00 00 00 0d 00 00 00 00 00 00 00 00 00 00 00
d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00

we have ABAR adress here, can be usefull.
still no success in MacOs, any suggestions?

Slice

Aug 30 2010, 06:47 AM

MBR formatted in ATA mode differ from one formatted in AHCI mode. (?) Or Large disk access (Windows <-> Linux)

XPbIM3

Aug 30 2010, 10:34 AM

QUOTE (Slice @ Aug 30 2010, 12:47 PM)

MBR formatted in ATA mode differ from one formatted in AHCI mode.

i don't think so.

QUOTE

(?) Or Large disk access (Windows <-> Linux)

Windows is not involved yet.
under Linux after setpci command i reinitialized controller with:

CODE

modprobe fakephp
echo 0 > /sys/bus/pci/slots/0000\:00\:1f.2/power
echo 1 > /sys/bus/pci/slots/0000\:00\:00.0/power

after that ahci module loaded (hdd led lighted for a while), ahci configured by ahci-mod (i think) and HDD became available.

gabiz_ro

Aug 30 2010, 10:12 PM

QUOTE

i have another question:
Successfully forced ICH7M in Aspire One to be AHCI from ubuntu as The King assumed below, trying to do that with DSDT patch with Snow Leo.

For me just under linux works.

QUOTE

Update2:
it seems like SATA controller changed it's mode that's why standart ATA driver refused to load, but DevID was not changed and AHCI driver refused to load too. Adding necessary ID to Plist made no change. Thinking about hex patch of kext.

If devid was not changed then controller is still in legacy mode.

-Maybe OSX drivers doesn't know how to assing ABAR and or initialize controller (but I remember some about on Apple using ICH7-M under OSX working in AHCI and blocked to legacy using bootcamp)
-During my tries,under windows wasn't enough to enable ABAR,controller needs more initialization.I was trying to print ABAR registers onscreen to debug somehow but always I ended with AHCI not enabled. ABAR+04h offset.

Just an idea,maybe as Function disable bit is declared into DSDT could be created something operating in memory mapped chipset registers to enable ABAR and in ABAR region to enable AHCI.

I have abandoned this since even enabling AHCI ICH7-M is still SATA I limited speed.
And I started something else but f....g stupid Dell BIOS doesn't like to boot from RAID cards.

XPbIM3

Aug 31 2010, 12:05 AM

QUOTE (gabiz_ro @ Aug 31 2010, 04:12 AM)

-Maybe OSX drivers doesn't ......

I think my DSDT patch is done wrong/ does not applying properly.

UPDATE:
Got things sorted out a little bit. Yes, My previous patch was wrong(offsets were messed up). Current one is working but Apple AHCI driver still does not loading. I will check the situation with lspci under SnowLeo from external USB HDD , but later....

And by the way, i have MAPV variable exactly in that place where AHCI mode must be set:

CODE

OperationRegion (SACS, PCI_Config, 0x40, 0xC0)
Field (SACS, DWordAcc, NoLock, Preserve)
{
...blah..blah
Offset (0x50),
MAPV, 2
}

Length is different, 2 instead of 4

XPbIM3

Sep 1 2010, 11:50 AM

Who do know ACPI specs well? Is there any way to Re-initialize the device in specific bus location?
Some kind of what been done in linux:

CODE

modprobe fakephp
echo 0 > /sys/bus/pci/slots/0000\:00\:1f.2/power
echo 1 > /sys/bus/pci/slots/0000\:00\:00.0/power

"Notify (SATA, Zero)" take no effect.

Konsti

Apr 15 2011, 10:06 PM

QUOTE (THe KiNG @ Apr 26 2010, 08:44 PM)

Works only for ICH7-M or ICH7-R

Dear THe KiNG (and friends) since this thread seems somewhat abandoned, please confirm the following, based on your reply last year...

My Shuttle XPC SG31G2V2 barebone/mobo (like other people's) that is based on the Intel G31 with ICH7 SATA controller, cannot have AHCI enabled in any way, correct?

The reason I've been visiting this thread is to check if there's some way to make my SATA controller appear/display in System Profiler (instead of blank).

Now that Apple supports TRIM for SSD drives (and our drives, too, with a simple hack since 10.6.7) it's imperative that I can have the controller be properly detected. Although my Intel X25-M is shown, the "TRIM Support" field is missing.

Am I doomed?

Is there some way to "fake" AHCI support for the ICH7 chipset? I know this sounds noob, just wanted to make sure I ask it.

Many thanks to all.

gushorty

Apr 15 2011, 11:16 PM

QUOTE (Konsti @ Apr 15 2011, 05:06 PM)

Dear THe KiNG (and friends) since this thread seems somewhat abandoned, please confirm the following, based on your reply last year...

My Shuttle XPC SG31G2V2 barebone/mobo (like other people's) that is based on the Intel G31 with ICH7 SATA controller, cannot have AHCI enabled in any way, correct?

The reason I've been visiting this thread is to check if there's some way to make my SATA controller appear/display in System Profiler (instead of blank).

Now that Apple supports TRIM for SSD drives (and our drives, too, with a simple hack since 10.6.7) it's imperative that I can have the controller be properly detected. Although my Intel X25-M is shown, the "TRIM Support" field is missing.

Am I doomed?

Is there some way to "fake" AHCI support for the ICH7 chipset? I know this sounds noob, just wanted to make sure I ask it.

Many thanks to all.

Have you visited the board manufacturer's site to see if there is a BIOS update available? They may have added the option in later versions of the BIOS.

Konsti

Apr 16 2011, 06:07 AM

QUOTE (gushorty @ Apr 16 2011, 02:16 AM)

Have you visited the board manufacturer's site to see if there is a BIOS update available? They may have added the option in later versions of the BIOS.

Indeed you are right, but the manufacturer stopped supporting this barebone. The last two BIOS updates did not have any additions such as AHCI support for SATA... unfortunately. That's the first I did, check for updates...

гык-sse2

Apr 16 2011, 01:16 PM

QUOTE (Konsti @ Apr 16 2011, 10:07 AM)

Indeed you are right, but the manufacturer stopped supporting this barebone. The last two BIOS updates did not have any additions such as AHCI support for SATA... unfortunately. That's the first I did, check for updates...

ICH7 doesn't have AHCI.
ICH7M has AHCI.
ICH7R has AHCI and RAID.

Konsti

Apr 16 2011, 10:02 PM

QUOTE (гык-sse2 @ Apr 16 2011, 04:16 PM)

ICH7 doesn't have AHCI.
ICH7M has AHCI.
ICH7R has AHCI and RAID.

Thanks sse2 for your input--somehow I knew this was happening: ICH7 has no AHCI.
So there is no way to "fake" AHCI on Snow Leopard to be able to show, among other things, the proper SATA controller name?
Any ideas?
Thank you all.

Slice

Apr 17 2011, 08:44 AM

Why do you bother about AHCI?
I have ICH7 (?)

CODE

00:00.0 [060000] [8086:27a0] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x0,0x0)
00:02.0 [030000] [8086:27a2] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x2,0x0)
00:02.1 [038000] [8086:27a6] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x2,0x1)
00:1b.0 [040300] [8086:27d8] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1b,0x0)
00:1c.0 [060400] [8086:27d0] (subsys [0000:0000]):: PciRoot(0x0)/Pci(0x1c,0x0)
00:1c.1 [060400] [8086:27d2] (subsys [0000:0000]):: PciRoot(0x0)/Pci(0x1c,0x1)
0c:00.0 [028000] [14e4:4315] (subsys [14e4:04b5]):: PciRoot(0x0)/Pci(0x1c,0x1)/Pci(0x0,0x0)
00:1c.2 [060400] [8086:27d4] (subsys [0000:0000]):: PciRoot(0x0)/Pci(0x1c,0x2)
09:00.0 [020000] [14e4:1600] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1c,0x2)/Pci(0x0,0x0)
00:1d.0 [0c0300] [8086:27c8] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1d,0x0)
00:1d.1 [0c0300] [8086:27c9] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1d,0x1)
00:1d.2 [0c0300] [8086:27ca] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1d,0x2)
00:1d.3 [0c0300] [8086:27cb] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1d,0x3)
00:1d.7 [0c0320] [8086:27cc] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1d,0x7)
00:1e.0 [060401] [8086:2448] (subsys [0000:0000]):: PciRoot(0x0)/Pci(0x1e,0x0)
02:01.0 [060700] [1180:0476] (subsys [0000:0000]):: PciRoot(0x0)/Pci(0x1e,0x0)/Pci(0x1,0x0)
02:01.1 [0c0010] [1180:0552] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1e,0x0)/Pci(0x1,0x1)
02:01.2 [080501] [1180:0822] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1e,0x0)/Pci(0x1,0x2)
00:1f.0 [060100] [8086:27b9] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1f,0x0)
00:1f.1 [01018a] [8086:27df] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1f,0x1)
00:1f.3 [0c0500] [8086:27da] (subsys [1028:01d6]):: PciRoot(0x0)/Pci(0x1f,0x3)

It works as is with 10.6.7

Konsti

Apr 17 2011, 10:09 AM

Dear slice and friends, the reason I need to fake AHCI (if this indeed is the main reason) is to make my MacPro3,1 recognize my SATA controller in System Profiler. Of course, you are right, ICH7 plays fine and out of the box... But...

Click to view attachment

First question: is the lack of AHCI the main reason as to why Snow Leopard doesn't show/display my SATA (0x27c0) controller? With the new TRIM hack now for IOAHCIFamily.kext (with patched plugin IOAHCIBlockStorage.kext) I would really like to have my SSD work with that.

My ICH7 system seems to run without problems the com.apple.driver.AppleIntelPIIXATA and com.apple.iokit.IOATABlockStorage extensions from the IOATAFamily.kext... obviously can't run IOAHCIFamily at all

Second question: Myself and stellarola over at this InsanelyMac thread, we tried to make the controller be recognized (although it works of course) by injecting more data in the Device (SATA) section of the DSDT but without success. Does anyone know the proper data/method perhaps and could help us?

The funny thing is that inside IORegistryExplorer, the AppleIntelPIIXATARoot has a Controller Name ("ICH7 SATA") and a CFBundleIdentifier ("com.apple.driver.AppleIntelPIIXATA") but nothing shows in System Profiler...

Perhaps there's a way to modify the MacPro3,1 model to allow ICH7 controllers? Make it a fake MacPro3,2 model, for example?

Thanks again.

tea

Apr 17 2011, 11:04 AM

TRIM supported only for native SATA controller (IOAHCIFamily.kext). ICH7 support only legacy SATA and not work with TRIM (IOATAFamily.kext).
IOAHCIBlockStorage.kext is plugin for both IOAHCIFamily and IOATAFamily, but from IOAHCIFamily it support TRIM and from IOATAFamily not. I check it with IDA Pro. I'm too have SSD and ICH7

Camilo

May 14 2011, 06:53 PM

Hello.

I have tried from ubuntu, byte 90 gets changed to 40h and controller assumes ahci mode.

I have inserted the patch into my working dsdt, but i don't know how to safely insert into my bios rom file to be flashed permanently.

I upload my bios file and the modified DSDT if someone can insert into or point me in the right direction i would be greatfull.

Thanks in advance.

Click to view attachment

abct

May 15 2011, 10:46 PM

QUOTE (Konsti @ Apr 17 2011, 11:09 AM)

Myself and stellarola over at this InsanelyMac thread, we tried to make the controller be recognized (although it works of course) by injecting more data in the Device (SATA) section of the DSDT but without success. Does anyone know the proper data/method perhaps and could help us?

The funny thing is that inside IORegistryExplorer, the AppleIntelPIIXATARoot has a Controller Name ("ICH7 SATA") and a CFBundleIdentifier ("com.apple.driver.AppleIntelPIIXATA") but nothing shows in System Profiler...

Perhaps there's a way to modify the MacPro3,1 model to allow ICH7 controllers? Make it a fake MacPro3,2 model, for example?

I don't know about ICH 7, but just for the record in case some might need it, I deleted SAT1 and SAT0 devices from my DSDT (HP HDX 16) and use the following instead for ICH9, which makes OS X to identify SATA devices as ICH8.

CODE

            Device (SATA)
            {
                Name (_ADR, 0x001F0002)
                Method (_DSM, 4, NotSerialized)
                {
                    Store (Package (0x02)
                        {
                            "device-id",
                            Buffer (0x04)
                            {
                                0x29, 0x28, 0x00, 0x00
                            }
                        }, Local0)
                    DTGP (Arg0, Arg1, Arg2, Arg3, RefOf (Local0))
                    Return (Local0)
                }
            }

Also, I noticed that I could also use real ICH9 id, in which case, OS X will identify it as Generic AHCI. No performance difference exists between these two methods.