Perfect you solved the problem. Interesting that it has to be closer to the beginning of the script. I never would have thought location of that scope would have made a difference either in the beginning or end of a script?


Here is where I put mine:





MSR only runs in 32 bit mode for me. CoolBook works at times and other times it doesn't and dunno why its inconsistent like that.

Isn't there something in the Ioreg that would tell me that C and P state are working or is it just the LCP is all I can get out of the Ioreg?

Rev 9 still does not take care of the System Profiler Memory issue.

In my case I think its ok to use the DSDT generated from the Dell XPS M1530 because almost all of them are exactly the same. Maybe Graphics card but I am using the Non CPU DSDT for Nvidia M8600 prepared by Brett Whinnen

If it were a Desktop with different devices, BIOS etc I would be concerned but think I am ok in this case.

Thanks Again for the help!!!

Just for inform you all, in the new mozodojo branch there is a fix for this "position" problem.

I always go with 32bit, so i dunno if its only 32bit, with less than 8GB of RAM it's useless to go with a 64bit kernel, it's just a good way to have compatibility issue imho.

You are right there is something in ioreg to check if SS is enabled but i don't remember right were it is, maybe someone else could help us.

You can find it in APCI_SMC_PlatformPlugin.

See attachments

To find out about C-States working in Terminal type sudo setpci -s 0:1f.0 0xa6.b
Terminal should return value "80" ! (thanks mm67)

Click to view attachment

Thanks for the reply

setpci: command not found

I don't see a property CSTinfo in the ioreg but I see the property PerformanceStateArray with Data 1-5 as it shows on your image file.

My memory info in Profiler is now working. The problem was with my com.apple.Boot.plist


<key>SMBIOSdefaults</key>
<string>No</string>
<key>SMBIOS</key>
<string>rd(0,0)/Extra/smbios.plist</string>



I removed the last key and string

Mojo,
the Serial Number, is perfect now!
On the Part Number side, i still get 1 character plus on Qimonda modules so, i'm using my solution there:

And man, it is fast now... nice work, you all
Click to view attachment

Latest mozodojo version of RC5 (231) SL 10.6.4 Dell Inspiron 1525 T5450 Processor. Model Identifier set to "MacBook3,1". Set keys in c.a.B.p for P-States and C-States. DropSSDT to Yes. No Speed Stepping according to VoodooMonitor and I get the "ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized" error on boot. Set the keys for just P-State (no C-State, no DropSSDT) and also no stepping. "sysctl - a | rep -i freq" shows the min and max freq to be the same. AppleLPC is loaded. Attached dsdt.

From my kernel log. Looks like it is loaded ok...

AppleIntelCPUPowerManagement: initialization complete
AppleIntelCPUPowerManagementClient: ready

I realize this might be a noob problem/question. I have searched around a fair bit but found nothing that has helped. Any advice or a pointer to the right things to read would be very much appreciated.

On a brighter note, Memory detection works perfectly.

Thanks

Edited:

Saw the error message: "Invalid characters in ProcessorOP" which is gone using version 231 from the mozodojo branch. Still no stepping...

Click to view attachment

If you look into ACPI_SMC_PlatformPlugin then you will find that for MacBook3,1 the speedstep is switching off.
You can get speedstep with such models
http://www.projectosx.com/forum/index.php?...post&id=780

Slice, Thank You! Setting my model identifier to MacBookPro5,2 worked according to VoodooMonitor (freq and voltage change based on load). Interestedly, sysctl still reports min and max both as the max freq for this processor and no switching. This is different from using VoodooPower which was accurately reported from both... IORegistry shows a reasonable performance state array and the ACPI...Plugin still shows the same error at boot time. It's definitely running hotter than with VoodooPower but that was not entirely unexpected.

I haven't looked into the /S/L/E/IOPlatformPluginFamily.kext/C/P/ACPI_SMC_PlatformPlugin since Leopard and having seen the individual models all broken out into different plists put me off the track when I didn't see the old style plist that could be edited to force it to use my choice of model identifier. Strange, I bunch of searching didn't find the solution, maybe I should't have had that last drink...

Ok, so... I have been resistant to using other peoples work without putting in the time and effort to get at least a basic understanding of what is going on. I absolutely don't fall into the drop the dsdt/extension/boot file in place, press the power button and cross your fingers crowd. It's been 15 years since I last was paid to write code. I'm willing to put in the effort to get things right on my own as much as I can. So that said...

My question is: What is a reasonable expectation for power management on this laptop (1525/T5450) and if there is more to be done what is the place to start?


RC5 is shaping up to be a real breakthrough, many thanks to the Chameleon Team!


Edited to add: I'm thinking about modifying the MacBook3,1.plist to include the PLimitDict MacBook3,1 set to zero. Any reason not to go this route? Are C-States just impossible on this laptop?

Any chance to enable Hardware Virtualization in Intel Processors in Chameleon?

Mojo

Great job on revision 253. It displays everything about the memory modules including Manuf during boot process after the boot0 easier to see now. Displaying the serial number is also a great feature because my modules have no obvious serial number written on them.

Not only PLimitDict. You need also to exclude CStateDict and add RestartAction.
My sample.

Great work!
Revision 262 generates CStates on an overclocked GA-EX58 with GenerateCStates=yes and a DSDT with standard PR scope.
Memory is shown as 1333MHz, not the actual running speed as Asere's did, but it's not a deal breaker for me.

Thanks again Slice. That modification allowed P-States with the Model Identifier MacBook3,1.

Not sure if it is OK to continue this in this thread as my questions are no longer directly related to RC5...

I have been struggling with C-States. I have tried a number of different possibilities but still have this error:

ACPI_SMC_PlatformPlugin::registerLPCDriver - WARNING - LPC device initialization failed: C-state power management not initialized

It is NOT proceeded by any _CST evaluation errors.

I'm left wondering if C-States are possible on this system. Dell 1525, T5450, 2GB Mem, 1280x800 LCD... I have read most threads (some with the help of Google translate) here and a few on other forums.

So, I have spent some hours comparing the OEM SSDT tables extracted using Linux (and while running MAC OS, of course the same) and real MacBook3,1 and MacBook4,1 tables and reading the ACPI spec document (which makes my eyes hurt after a while). Thinking that the Chameleon RC5 generated tables are incomplete for this system I then tried a few different SSDT tables.

First one based on your commented out tables from your dsdt (changed for my p state specifics and the locations of the hidden tables. Click to view attachment

and a generic Click to view attachment

What I have not tried is real MacBook3,1 Tables (Modified for my CPU of course). One, I have only been able to find MacBook4,1 SSDT Tables and, two, I don't know how I would find out the address the tables (were loaded to so I could change the hardwired values like these:




I'm have been using a slightly modified version of your dsdt for this testing. Click to view attachment

In E/E I have: LegacyHDA, LegacyBluetooth (to enable bluetooth on-off), VoodooBattery, VoodooPS2 and VoodooSDHC
In /S/L/E I have FakeSMC (2.7.2) and the 10.6.2 version of AppleHDA.

Here is a dump of my ioreg: Click to view attachment

I have done a few table dumps while trying different things and this caught my eye (not sure if it is relevant, but I don't know) in the FACP table.




The _CST Support is always 0 . Not sure if it is part of the cause or a symptom.

At this point I have exhausted what I can try given my skill and experience. If this is not possible, then I will waste no more time. If it is, I would be grateful for any help that you might offer.

Hey, can someone here break it down with what I need to do to enable the native AppleIntelCPUPowerManagement. I'm unfamiliar with LPC, HPET, PStates, and CStates. I'm not afraid of the DSDT if I need to do anything there.

I doubt it, but if it has anything to do with it, I've got an Acer Aspire One ZG5 running 10.6.4 w/ legacy_kernel.

With the Chameleon from this thread, I don't need to null the APM anymore, but it still isn't enabled, and I'm very unclear of where to start to get it working.

Also, if I were to get this enabled, would I be able to natively hibernate? This Chameleon fixed my sleep, but only with SleepEnabler for 10.6.4 and only when using a disk image(hibernatemode=0). When I try to keep the ram active (hibernatemode=1,3), immediate KP.

Mojo quick question,

The Official Sources are at Assembla correct? I am a bit confused because your source is also at forge.voodooproject.org and it seems that the revision level have a much lower number and not sure how they correlate to your sources on Assembla?

Where do you suggest I grab the latest sources?

Thanks

osxfr33k,

the stuff at forge.voodooprojects is the most up to date, specially the trunk
Mojo been committing everything there.

Hello everybody,

I've try your work.
Very good work

With my first Hackintosh GA-EP45-DS3L + E1400@2Ghz
- temp IDLE from 50°C to 29°C, very good.

but with my second Hackintosh GA-P35-DS3P + E2180@2Ghz
- nothing better 50°C in idle.

Someone can help me for cleanup my DSDT because i've try myself and make KP.

Thank you for this version of chameleon.

Laurent

Hello,

and again i have to say, thats a great osx86 tool.
anway i have folowing suggestion:

would it be possible to merge this with netkas pcefi boot.
the reason is that pcefi has so great gfx recognition. I use a 9800gt, a 8600gts and a hd4670 just with vanilla kexts, no dsdt editing no efi strings. I sure use chameleon as bootloader, but as said with pcefi boot file.
with this release all my gfx are set into standard mode 1024x, so that I would have to add efi strings for the nvidia cards, and edit dsdt for the ati. with pcefi, all cards work native. so what about supporting most gfx?
the situation i as you have to choose between two great looking gils, but you would rather have them both
to get serious again. maybe its good to have different dev branches, as new ideas can be adopted faster, on the other hand i feel as in this case, already existing functionality get lost.

Hi Mojodojo,

congratulations for the great work on Chameleon.

I have a suggestion: what about a new version of your VoodooMonitor app that gets from ioreg the P-states generated by Chameleon, and gets status info from FakeSMC, instead of using its own kext?

Thanks for your great contribution to the scene.

Hi to all!
today I was fidling around with ssdt.

And this is mine test:

All major DSDT patches are added throught SSDT tables.
After making SSDT I have done BIOS update to see what will happen.
All went well and I got new DSDT, but I did not lost mine functions and modifications added over ssdt.

List of SSDT added:
SSDT.dsl - USB/EHCI
SSDT-1.dsl - HDEF/SMBUS
SSDT-2.dsl - Ethernet/Firewire/Airport
SSDT-3.dsl - C-states
SSDT-4.dsl - P-states

P-states are for Xeon X3440
Even I think that other devices can be added like TMR RTC and PIC for fixing IRQ confilicts.

Click to view attachment

Hello jadran.. what mus i change for my Intel Prozesor i5-650 ?
I hva not to time a DSDT run. I hav load the new Chameleon RC5-518.
I will test with Speedstep with this prozesor and my MSI-P55-GD65
Motherboard.
DSDT is for me new, hav ever without this running my System 10.6.4 (64Bit).
Maby you hav Tipps for me, we i begin this DSTD Patch with combination
the Chameleon RC5-518 Version.

Greetings from Germany Pinarek

Wow! What I see? You override DSDT devices via SSDT! Need more investigation for this. Interesting trick.

Where is no longer VID values in P-States for newest Core ix cpus. I've stopped voodoomonitor development and I am afraid I'll not start it again

Only thing I did change in mine new DSDT is name of processors from P001 to CPU0 and so on... because mine ssdt with PStates are named CPU0. Even I think that is just cosmetics for IOReg.

One thing i tested your PstateGeneration on mine Xeon X3440 and it gives me instant reboot - used latest trunk from forge.voodoo

of course, your Xeon is core i7 i think (socket 1156) - where is no support for it for now. But you always could extract you P-States from native SSDTs of your motherboard (i didn't heard yet about 1156 mobo that can't generate beautiful P-States in SSDT).

But you're understand what does it mean, the feature you've discovered? DSDT is needless and we can patch it without difficult editing process. We could prepare generic patches for different mobos and devices and use it by a easier way: not so difficult like to patch DSDT itself.

That was for chameleon test, speedstep works even without SSDT with Pstates on these boards.



Yes, I understand... I am not new in DSDT stuff... and the reason for finding it is because there was no AZAL/HDEF in mine MSI board, and in similar manner are added SSDT stuff in imac11,1

So, for Mac OS X SSDT has higher priority than DSDT for device declaration. Thats why SSDT device overriding works.

Yes, have a look at this ssdt from imac, and everything will clear for you.
Click to view attachment

One thing, when U put DTGP method in ssdt it will be compiled and functional in OSX, but once U decompile that same SSDT, DTGP will be modified. Look at mine SSDT from previous post.

What would be the benefit to using a bunch SSDTs as opposed one DSDT? Organization? From a development standpoint I guess it would be easier to manage with several smaller SSDT patches rather than one large DSDT. Is this what you're suggesting?

For now I can't make HPET patch working with SSDT. Without HPET patch this method is not useful cos we still need in DSDT.

I've only just found this thread, I just want to say thanks to Mojodojo and the Chameleon crew as I think it's great that new stuff is being added like this.Hi, nice to see someone else on here running an AAO ZG5, and even better to hear that sleep is working with this version of Chameleon. (I'm using Chameleon RC3 right now as I've had it modify it a little in order to fix the brightness of my screen, but I'm planning to try this new RC5 as I'd really like to get sleep working.)
The AAO doesn't seem to have any HPET options in the BIOS, usually it has to be set to 32 or 64 bit mode in most BIOS chips that have HPET implemented

Can I ask what you mean by legacy_kernel? Is this just the 10.4 kernel patched to work with the Atom CPU? FWIW I'm using mach_kernel_atom which was patched by tea, have you tried this as it may work better compared to the legacy kernel.

Hey,
Having a brain-melting moment trying to enable speed stepping and just after some help from you guys.
I'm running a hack on ASUS P5K-E wifi/AP with Q6600.

I have done a lot of patching to my dsdt (well, copying and pasting) so that I'm able to boot up and use Apple's Power Management.
Shutdown, Restart, Sleep, Wake and Shutdown/Restart after sleep all working.
USB and SATA show up correctly for MacPro 3,1 - ie built-in USB and SATA as ESB2 AHCI.
Audio all working, network etc etc and blah

BUT . . .

I have tried and failed at inserting P state tables / patches into my dsdt - no KP's - just no effect that I can see in voodooMonitor.
I have since reverted back to a dsdt that doesn't have any _CST methods inserted.

I'm still running Chameleon RC3, so I still have PlatformUUID and OSXRestart in E/E.
So I'm guessing I can get rid of those if I install this RC5 release?

Just wondering if this release will help me solve my non SpeedStepping Toaster oven ?
Do I just need to replace the current boot file with this new release boot file and insert a few flags into my boot.plist to enable P and C state injection?
Or is there quite a bit more to it than that?

Regards
AI

Sorry to clutter up the forum - yes, it really was that easy.
Works !

hello

where find the last binaries ?

Because i've not time for make it myself.

Thank you.

Hello!

I wonder if you could explain to me how the SystemMemory, 0x37F7FDBC is calculated or point me in the right direction.
Also if I take one of your other examples with ICH9 0xA0 does SystemMemory have a table(document) like for ICH9?

I have searched the net and found squat


Thank you in advance for any help given.