Project OS X Forums > Smbus Enable/disable Dsdt Fix

Full Version: Smbus Enable/disable Dsdt Fix

Project OS X Forums > Snow Leopard Guides & Tutorials > DSDT Patching

THe KiNG

Jan 10 2010, 10:27 PM

As you might know SMBus is not enabled by default on some PC's, so for that there is a code in Chameleon and derivates that enables it.
However the Chameleon fix works only until you sleep/wake the computer after that in Kernel/System log you may see this error:

QUOTE

kernel[0]: pci restore waited for SBUS (11487) fail

And if you do lspci -nnvv after wake:

QUOTE

00:1f.3 Class [ffff]: Illegal Vendor ID Device [ffff:ffff] (rev ff) (prog-if ff)
!!! Unknown header type 7f

Well lets fix that!
Same test machine ASUS M50SV ICH8-M same ICH8 specs.

As I explained on Function Disable Registers we need to add this code first, if is not already in our DSDT(this time we use ICH8, notice that is different then ICH7, fix it using intel docs to match your ICHx)):

CODE

        OperationRegion (RCRB, SystemMemory, 0xFED1C000, 0x4000) // Chipset Configuration Register Memory Map
        Field (RCRB, DWordAcc, Lock, Preserve)
        {
            Offset(0x0000), // Backbone
            Offset(0x1000), // Chipset
            Offset(0x3000), // Legacy Configuration Registers
            Offset(0x3404), // High Performance Timer Configuration
            HPAS, 2,    // Offset: 3404h Address Select 
            , 5,        // Offset: 3404h, Bit: 2
            HPAE, 1,    // Offset: 3404h, Bit: 7 Address Enable
            Offset(0x3418), // FD (Function Disable)
                , 1,    // Offset: 3418h  Bit: 0 BIOS must set this bit to 0b
                , 1,    // Offset: 3418h, Bit: 1 Reserved
            SATD, 1,    // Offset: 3418h, Bit: 2 SATA Disable
            SMBD, 1,    // Offset: 3418h, Bit: 3 SMBUS Disable
            HDAD, 1,    // Offset: 3418h, Bit: 4 Intel High Definition Audio Disable
                , 3,    // Offset: 3418h, Bit: 5/6/7 Reserved
            US1D, 1,    // Offset: 3419h  Bit: 0 UHCI #1 Disable
            US2D, 1,    // Offset: 3419h, Bit: 1 UHCI #2 Disable
            US3D, 1,    // Offset: 3419h, Bit: 2 UHCI #3 Disable
            US4D, 1,    // Offset: 3419h, Bit: 3 UHCI #4 Disable
            US5D, 1,    // Offset: 3419h, Bit: 4 UHCI #5 Disable
            EH2D, 1,    // Offset: 3419h, Bit: 5 EHCI #2 Disable
            LPBD, 1,    // Offset: 3419h, Bit: 6 LPC bridge Disable
            EH1D, 1,    // Offset: 3419h, Bit: 7 EHCI #1 Disable
            Offset(0x341A), // FD (Function Disable) Root Ports
            RP1D, 1,    // Offset: 341Ah  Bit: 0 Root Port 1 Disable
            RP2D, 1,    // Offset: 341Ah, Bit: 1 Root Port 2 Disable
            RP3D, 1,    // Offset: 341Ah, Bit: 2 Root Port 3 Disable
            RP4D, 1,    // Offset: 341Ah, Bit: 3 Root Port 4 Disable
            RP5D, 1,    // Offset: 341Ah, Bit: 4 Root Port 5 Disable
            RP6D, 1,    // Offset: 341Ah, Bit: 5 Root Port 6 Disable
            , 2,        // Reserved
            THTD, 1,    // Offset: 341Bh  Bit: 0 Thermal Throttle Disable
            ST2D, 1,    // Offset: 341Bh, Bit: 1 SATA #2(D31:F5) Disable
        }

Ok now that we set the registers, lets go back to our best friend PINI method and make sure SBUS is enabled on boot/wake first:

CODE

    Method (PINI, 0, NotSerialized) // For PCI0/Wake INI
    {
        Store (Zero, SMBD) // SMBus Enable
        // ................. // If you have more stuff to add, mine got already bigger...
    }

Do not forget the call of PINI in _WAK method and on PCI0 _INI method!

CODE

    Method (_WAK, 1, NotSerialized)
    {
        PINI ()
        // ....... // Rest of your stuff from _WAK method
    }

CODE

        Device (PCI0)
        {
            Method (_INI, 0, NotSerialized)
            {
                PINI ()
            }

            // ....... //
        }

Now in plus we have to make sure SBUS is disabled when computer goes to sleep or shutdowns, so we have to disable it on _PTS method:

CODE

    Method (_PTS, 1, NotSerialized) // Prepaire to sleep
    {
        Store (One, SMBD) // SMBus Disable
        // ................. // Rest of your _PTS stuff
    }

Enjoy!

devn

Jan 10 2010, 11:14 PM

Hi! in my dsdt instead - HDAD, 1, // Offset: 3418h, Bit: 4 Intel High Definition Audio Disable
= AZLD, 1,
i need to replace to HDAD? help

18seven

Jan 11 2010, 12:35 AM

QUOTE (devn @ Jan 10 2010, 06:14 PM)

Hi! in my dsdt instead - HDAD, 1, // Offset: 3418h, Bit: 4 Intel High Definition Audio Disable
= AZLD, 1,
i need to replace to HDAD? help

If you changed Device AZIL to HDEF it would make sense to globally reflect that, your machine could care less. The value of Offset: 3418h, Bit: 4 is whats important.

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